This research primarily seeks to incorporate advanced neuron models, such as those capturing dendritic computation and probabilistic Bayesian network behavior, into unconventional computing architectures, replacing conventional structureless and deterministic LIF point-neuron models. This is pursued through circuit designs that exploit and control memristor dynamics (e.g., local activity and stochasticity). For example, localized dendritic activation underlies numerous computational functions across hierarchical levels, such as denoising (filtering), increased expressivity (tunable local activation), multi-timescale adaptation (local memory), and stimulus-specific adaptation (multi-task processing). While the co-optimization of dendrite-inspired functional circuits with emerging memory devices has only recently been explored, this doctoral project aims to advance that frontier.
Initially, the research will explore CMOS–memristor hybrid implementations, leveraging their analog tunability and high-order dynamics to realize dendrite-inspired functional circuits. These circuits will subsequently be integrated as core computational modules within unconventional computing architectures, enabling algorithm–circuit co-optimization across the computing pipeline with respect to key metrics such as power consumption, computational delay, and area efficiency. Beyond circuit prototyping, the project will conduct task-level benchmarking to evaluate overall system performance in relation to both dendrite–neurosynaptic functionalities and the intrinsic characteristics of memristive devices.
You, as a doctoral researcher, will:
- Explore energy–delay efficient unconventional computing architectures through both simulation and experimental prototyping
- Perform iterative hardware–algorithm co-design, accounting for real-world device features and non-idealities
- Contribute to benchmarking and evaluation frameworks, identifying “champion” designs for PCB or IC prototyping
More specifically, you will:
- Conduct numerical modeling and validation of brain-inspired algorithms
- Develop circuit-plausible training and inference algorithms, and analyze their behavior in LTspice and Cadence Spectre
- Perform algorithm–circuit co-optimization and hardware-aware modeling
- Quantify performance and benchmark results against state-of-the-art architectures
- Support tape-out and testing of prototype circuits using Altium Designer and Cadence Virtuoso
- Set up experimental systems for circuit measurements and data analysis
- Collaborate within a cross-disciplinary team involving neuroscientists, device physicists, and algorithm developers
Table of Content
Summary
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Benefits
- INFRASTRUCTURE: A world-leading, international research environment with state-of-the-art equipment
- TEAM & ENVIRONMENT: Opportunity to work in the highly interdisciplinary and exciting field of neuromorphic and brain-inspired computing, collaborating with physicists, neuroscientists, materials scientists, and engineers
- FLEXIBILITY: Flexible working arrangements
- VACATION: You will receive 30 days of vacation
- PERSPECTIVE: The position contract is initially 3 years with mutually-agreed extension and longer-term opportunities.
- KNOWLEDGE & DEVELOPMENT: Your professional development is important to us – we support you specifically and individually e.g., through training and networking opportunities specifically for doctoral candidates (JuDocS): https://go.fzj.de/JuDocs
- SUPPORT FOR INTERNATIONAL EMPLOYEES: Targeted services for international employees, e.g., through our International Advisory Service
- FAIR REMUNERATION: Depending on your qualifications and assigned responsibilities, you will be classified according to pay group 13 (75%) of the TVöD-Bund. Additionally, you will receive a special payment (“Christmas bonus”) amounting to 60% of one month’s salary. All information about the TVöD-Bund collective agreement can be found on the BMI website (pay scale table on page 66 of the PDF download): https://go.fzj.de/bmi.tvoed
Requirements
- Bachelor’s degree with subsequent Master’s in electrical or electronic engineering or a closely related discipline
- Strong foundation in analog/mixed-signal circuit design
- Experience with emerging memory devices
- Experience with simulation tools (LTspice, Cadence, MATLAB, Python)
- Interest in brain-inspired computation, energy-efficient hardware, and experimental validation
- Ability to work collaboratively in a multidisciplinary research environment
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Application Deadline
Not SpecifiedHow To Apply
Are you qualified and interested in this opportunity? Kindly go to
Forschungszentrum Jülich on www.fz-juelich.de to apply
For more information, kindly visit FZ Juelich webpage.